Powering automotive infotainment cluster systems – EDN.com

Editor’s note: It’s not enough to choose an IC for your design just by what is in the data sheet; you will need to choose the right package and pay attention to the manufacturing and assembly needs of the final system. The following is an excellent tutorial emphasizing this important part of your overall architectural design consideration. Read what Tim Hegarty has put together for your engineering education ‘toolkit’.

Steve Taranovich

A novel DC/DC power management integrated circuit (IC) package technology [1] not only improves a power circuit’s noise and emissions performance [2] but enhances reliability and extends product lifetimes, which are particularly relevant in high-performance automotive equipment systems. Both individually and together, several IC packaging attributes [6-10] can enable increased reliability, including pinout arrangement, wettable flank pins, pin clearance, and board-level reliability. In this article, I’ll focus specifically on reliability and pinout arrangement.

Figure 1 presents a system block diagram of an automotive hybrid cluster application [3-5] with the off-battery power distribution network highlighted in red. The load current requirements of these systems are trending higher given the mandate to support complex and reconfigurable content – including media selections from various sources, 3D navigation, driver monitoring systems, front- and rear-view cameras, and content from infotainment head units – all seamlessly blended in numerous high-definition displays. Reliability is paramount in such automotive environments given the imperative of safety, especially against the backdrop of the rapidly evolving transition to autonomous driving systems.

Figure 1
System block diagram of a microcontroller-based hybrid cluster with informational graphics support

Figure 2 shows a dual-output buck regulator [11] schematic with the Texas Instruments LM5143-Q1, an automotive-grade wide VIN buck controller used in off-battery power subsystems to convert the battery voltage into various voltage domains used by the cluster.

Figure 2
Dual-output synchronous buck controller and power-stage schematic

The buck regulator outputs supply 3.3-V and 5-V intermediate voltage rails that source other downstream power supplies in the cluster power subsystem. The off-battery automotive environment is particularly challenging, with severe voltage transients coupled with large operating temperature swings.

IC pinout definition and arrangement

In general, the goal in pinout assignment for a power-management IC is to avoid having high-impedance signal pins close to high-voltage power pins switching at high frequency and high slew-rate voltages (dv/dt). Achieving this goal curtails not only noise coupling but also the effects of parasitic resistive and capacitive paths caused by residual solder flux, as well as contaminants arising from the printed circuit board (PCB) manufacturing process. A problem related to PCB contaminants is likely more evident in operating conditions with high ambient temperatures and high humidity.

Establishing a distinct separation between high-voltage power pins and the low-voltage precision analog signal pins through careful pinout assignment is particularly important for higher-voltage automotive applications. For example, the 12-V automotive battery rail incurs voltage deviations exceeding 40 V during transient load-dump events.

As shown in Figure 3, the controller has a symmetric pinout structure for each buck regulator channel. The pins related to the power MOSFET gate drivers (LO1/2, HO1/2) are located on one side of the package, close to where the MOSFETs are placed. These gate driver pins are physically separated from the small-signal analog pins responsible for control and compensation (SS1/2, FB1/2, COMP1/2, CS1/2). The groups of power pins are shielded from critical signal pins by adjacent pins with digital functions (PG1/2) or those with a DC voltage applied (VIN, VCCX).

Figure 3
Dual-channel buck controller pinout diagram

In particular, the location of high-voltage switch node (SW1/2) and high-side gate driver supply bootstrap (HB1/2) pins mitigates the possibility of coupling to adjacent sensitive nodes from switching at a high slew rate and high frequency. Dedicated gate driver supply (VCC) and ground (PGND) pins for each channel reduce the possibility of channel crosstalk and interference, maximizing robustness and reliability, particularly at 50% duty cycle operation when the two channels are interleaved 180 degrees out of phase.

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